library ieee;
use ieee.std_logic_textio.all;
use STD.TEXTIO.all;
use ieee.std_logic_1164.all;


entity alu_tb is
end alu_tb;

architecture testbench_arch of alu_tb is
  component alu
    port (
      opcode : IN std_logic_vector(4 DOWNTO 0);
	   A : IN std_logic_vector(31 DOWNTO 0);
      B : IN std_logic_vector(31 DOWNTO 0);
      output : OUT std_logic_vector(31 DOWNTO 0);
      negative : OUT std_logic;
      overflow : OUT std_logic;
      zero : OUT std_logic
	 );
  end component;

  signal opcode           : std_logic_vector (4 downto 0);
  signal overflow, negative, iszero   : std_logic;
  signal A, B     : std_logic_vector (31 downto 0);
  signal result     : std_logic_vector (31 downto 0);
  signal tmp      :std_logic_vector(2 downto 0);

  constant zero : std_logic_vector := "00000000000000000000000000000000";
  constant v1   : std_logic_vector := "00000000000000000000000000000001";
  constant v2   : std_logic_vector := "00000000000000000001001001110001";
  constant v3   : std_logic_vector := "00000000000000000110001000011111";

  procedure println( output_string : in string ) is
    variable lout                  :    line;
  begin
    WRITE(lout, output_string);
    WRITELINE(OUTPUT, lout);
  end println;

  procedure printlv( output_bv : in std_logic_vector ) is
    variable lout              :    line;
  begin
    WRITE(lout, output_bv);
    WRITELINE(OUTPUT, lout);
  end printlv;


begin
  DUT : alu
    port map (
      opcode => opcode,
      A => A,
      B => B ,  
      output => result,
      negative => negative,
      overflow => overflow,
      zero => iszero
      );


  process

  begin

    println("");
    println("Starting Test");

    -- reset                            --------------
    opcode <= "00001";
    A      <= x"F1111111";
    B      <= x"F22AF223";
    wait for 50 ns;
    
    printlv(result);
    tmp<=overflow&negative&iszero;
    
    wait for 50 ns;
    
    if (tmp="010") then println("succeed!");
    else printlv(tmp);
    end if;

    wait;
    
  end process;
end testbench_arch;